1. Field of the Invention
This invention relates generally to the field of semiconductor circuit design, and more particularly to the design of improved power-up control in low-power systems.
2. Description of the Related Art
A POR (power-on-reset) signal is typically required by digital circuits such as memory elements, flip-flops, microcontrollers and central processing units to set an initial state immediately after powering on the circuit. For example, when powered on, most of the programmed or programmable type logic circuits, in particular microprocessors, must be set in a zero state or RESET state in order to insure that no undetermined logic states are present in any portion of the circuit. This signal has been traditionally generated externally, typically using an external RC circuit or simply a switch, the latter having to be manually operated in most cases.
More recently, integrated POR circuits have been incorporated into system on a chip (SOCs) circuits and/or more extensive controller chips and integrated circuits. Some integrated POR circuits typically deliver a RESET signal when the supply voltage rises and reaches a first switching threshold voltage, and release the RESET signal upon the supply voltage reaching a second switching threshold voltage. One problem of integrating a POR circuit operated according to this technique is with the rate of the rise of the power supply, which is generally quite slow. As a result, the RC time constant needs to be very large for successful generation of a POR signal. Realization of such high time constants on chip may take up too much space to be practical, although the same time constant may be easily realized in an external circuit.
Accurate reset generators typically require a bandgap voltage reference. A bandgap voltage reference is a voltage reference widely used in integrated circuits, and has been a preferred method of generating a stable low-voltage (˜1.25 V) reference in many low-voltage analog circuits. Bandgap circuits have also been used in digital integrated circuits (ICs) to provide a local bias that is not adversely affected by ambient noises or transients. Typically, a bandgap circuit relies on two sets of transistors running at different emitter current densities, one set of transistors having approximately ten times the emitter current density of the other set of transistors, resulting in an approximately 60 mV voltage difference between the base-emitter voltages (Vbe) of the two sets of transistors. This voltage difference is typically amplified by a factor of about 10 and added to a Vbe voltage.
FIGS. 1a and 1b provide examples of prior art circuits used in powering up a system. In FIG. 1a, a Main Logic Block is powered by a supply voltage (Vdd) generated by a Voltage Regulator, which is powered by an external voltage HV. The Voltage Regulator is configured to operate with a bandgap reference voltage VBG, which is generated by a Bandgap reference circuit powered by HV, and brought to its proper operating level by a Bandgap start-up circuit, which is also powered by HV. A separate POR circuit, which may be powered by HV or Vdd, is used to provide the required POR signal to the Main Logic Block. In FIG. 1b, the separate POR circuit is replaced by a Reset Generator configured to operate with VBG. The Reset Generator then provides the necessary reset signal to the Main Logic Block. In both cases a main system memory is also coupled to the Main Logic Block.
As seen in FIGS. 1a and 1b, the Bandgap Reference circuit may require a Bandgap start-up circuit to bring it to the proper operating point. Once the Bandgap Reference circuit has reached the desired operating point, the Bandgap start-up circuit will typically continue to draw a certain amount of current as long as the power remains turned on. Thus, a typical start-up circuit will always continuously consume some current, adding to undesired quiescent currents in the system. In addition, a typical Reset Generator will not operate accurately if the reference voltage (VBG) it uses has not reached its final level, which may happen if the supply voltage (Vdd) reaches the desired operating level very slowly. In some cases, the Main Logic Block (or circuit) may be kept in the reset state with a simple POR circuit operated without the use of a bandgap reference (FIG. 1a), which may result in the POR circuit tripping at an unpredictable voltage. Although this voltage level may be sufficient for the Main Logic Block circuits to operate, it may be too low to read an on-chip memory (such as the Memory in FIGS. 1a and 1b). A POR circuit on the external power supply side may also effectively perform the task, but it may not be accurate enough.
Many other problems and disadvantages of the prior art will become apparent to one skilled in the art after comparing such prior art with the present invention as described herein.